DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 351

IC TRPL ATM/PACKET PHY 400-PBGA

DS3163

Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3163

Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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12.14.4.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 8: Receive Minimum Packet Size (RMNS[7:0]) – These eight bits indicate the minimum allowable
packet size in bytes. The size includes the FCS bytes, but excludes bit/byte stuffing. Note: In FCS-32 mode,
packets with six bytes are the minimum packet size allowed, in FCS-16 mode, packets with four bytes are the
minimum packet size allowed, and when FCS processing is disabled, packets with two bytes are the minimum
packet size allowed. Packets less than the minimum size will be aborted.
Bit 5: Receive FCS Processing Disable (RFPD) – When 0, FCS processing is performed (the packets have an
FCS appended). When 1, FCS processing is disabled (the packets do not have an FCS appended).
Bit 4: Receive FCS-16 Enable (RF16) – When 0, the error checking circuit uses a 32-bit FCS. When 1, the error
checking circuit uses a 16-bit FCS. This bit is ignored when FCS processing is disabled.
Bit 3: Receive FCS Extraction Disable (RFED) – When 0, the FCS bytes are discarded. When 1, the FCS bytes
are passed on. This bit is ignored when FCS processing is disabled.
Bit 2: Receive De-scrambling Disable (RDD) – When 0, de-scrambling is performed. When 1, de-scrambling is
disabled.
Bit 1: Receive Bit Reordering Enable (RBRE) – When 0, bit reordering is disabled (The first bit received is stored
in the MSB of the receive FIFO byte RFD[7]). When 1, bit reordering is enabled (The first bit received is stored in
the LSB of the receive FIFO byte RFD[0]).
Bit 0: Receive Pass-Through Enable (RPTE) – When 0, pass-through mode is disabled and packet processing is
enabled. When 1, pass-through mode is enabled, and all packet-processing functions except de-scrambling and bit
reordering are disabled.
Reserved
RMNS7
15
0
7
0
Reserved
RMNS6
14
0
6
0
PP.RCR
Packet Processor Receive Control Register
(1,3,5,7)C0h
RMNS5
RFPD
13
0
5
0
RMNS4
RF16
12
0
0
4
RMNS3
RFED
11
0
3
0
RMNS2
RDD
10
0
2
0
RMNS1
RBRE
9
0
1
0
RMNS0
RPTE
8
0
0
0

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