DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 27

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3 DS3/E3 Internal Fractional (Subrate) ATM/Packet Mode
DS3/E3 Internal Fractional Mode allows subrate datastreams to be inserted into a DS3 or E3 line, with the
fractional overhead internally controlled. Major functional blocks for the DS3/E3 Internal Fractional Mode are
shown in
The “-OHM” modes are not allowed in fractional framing modes since the user is not able to distinguish between
internal framing overhead and external framing overhead bit locations.
Table 6-3. DS3/E3 Internal Fractional (IFRAC) ATM/Packet Mode Configuration Registers
UTOPIA L2 ATM
UTOPIA L3 ATM
POS-PHY L2 ATM
POS-PHY L3 ATM
POS-PHY L2 Packet
POS-PHY L3 Packet
Figure 6-3. DS3/E3 Internal Fractional ATM/Packet Mode
MODE
Figure
TOHMOn/
RLCLKn
RNEGn/
ROHMIn
TLCLKn
RPOSn/
TPOSn/
TNEGn/
RLCVn/
RDATn
TDATn
6-3. Mapping configuration is programmable on per port basis and is shown in
Clock Rate
Adapter
FM[5:0]
0XX010
0XX010
0XX010
0XX010
0XX010
0XX010
Decoder
Encoder
B3ZS/
HDB3
HDB3
B3ZS/
SIM[1:0]
TUA1
GL.CR1
TAIS
00
01
10
11
10
11
IEEE P1149.1
JTAG Test
Access Port
FEAC
DS3 / E3
Receive
Framer
DS3 / E3
Transmit
Formatter
Buffer
Trace
Trail
PORT.CR2
HDLC
PMCPE
X
X
1
1
0
0
GEN
UA1
TX FRAC
RX FRAC
Rx Packet
Processor
Processor
Processor
RX BERT
Processor
Tx Packet
TX BERT
Rx Cell
Tx Cell
Microprocessor
Interface
FIFO
FIFO
Tx
Rx
n = port # (1-4)
Table
6-3.