DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 54

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TDXA[4:2]
TDXA[1] /
TPRTY
TSOX
TPXA
TSPA
TEN
PIN
TYPE
Oz
Oz
O
I
I
I
In 8-bit mode, TDATA[7] is the MSB, TDATA[0] is the LSB, and TDATA[31:8] are not
used and ignored.
Transmit Parity
TPRTY: This signal indicates the parity on the data bus when parity checking is
enabled. This option is programmable. TPRTY is ignored if parity checking is
disabled. This signal is sampled on the rising edge of TSCLK.
Transmit Enable (active low)
TEN: This signal is used by the ATM/Link device to control the transfer of cell/packet
data on the TDATA bus. If TEN is high, no transfer occurs. If TEN is low, a transfer
occurs. This signal can be sampled on the rising edge of TSCLK.
Transmit Direct cell/packet Available [1] / Polled cell/packet Available (tri-state)
This signal is tri-state when global reset is applied.
TDXA[1]: When direct status mode is selected, this signal is used to indicate when
port 1 can accept data from the ATM/Link layer device. This signal is updated on the
rising edge of TSCLK.
In UTOPIA L2 or Utopia L3 modes, TDXA goes high when port 1 can accept the
transfer of more than a programmable number of ATM cells. TDXA goes low when
port 1 cannot accept the transfer of a complete ATM cell.
In POS-PHY L2 or POS-PHY L3 modes, TDXA goes high when port 1 can store more
data than the "almost full" level. TDXA goes low when port 1 is full.
TPXA: (reset default) When polled status mode is selected, this signal is used to
indicate when the polled port, as selected by TADR[4:0], can accept data from the
ATM/Link layer device. This signal is updated on the rising edge of TSCLK.
In UTOPIA L2 or UTOPIA L3 modes, TPXA goes high when the polled port can
accept the transfer of more than a programmable number of ATM cells. TPXA goes
low when the polled port cannot accept the transfer of a complete ATM cell.
In POS-PHY L2 or POS-PHY L3 modes, TPXA goes high when the polled port can
store more data than the "almost full" level. TPXA goes low when the polled port is
full.
In UTOPIA L2 (reset default) or POS-PHY L2 modes, this signal is driven when one
of the ports is being polled, and is tri-stated when none of the ports is being polled or
when data path reset is active.
In UTOPIA L3 or POS-PHY L3 modes, this signal is driven.
Note: Polled status mode and direct status mode is selected by the GL.CR1.DIREN
bit.
Transmit Direct cell/packet Available [4:2]
TDXA[4:2]: This signal is used to indicate when the associated port can accept data
from the ATM/Link layer device. This signal can be updated on the rising edge of
TSCLK.
In UTOPIA L2 or L3 modes, TDXA goes high when the associated port can accept
the transfer of more than a programmable number of ATM cells. TDXA goes low
when the associated port cannot accept the transfer of a complete ATM cell.
In POS-PHY L2 or L3 modes, TDXA goes high when the associated port can store
more data than the "almost full" level. TDXA goes low when the associated port is full.
Transmit Start Of Cell/Packet
TSOX: This signal is used to indicate the first transfer of a cell/packet. This signal
can be sampled on the rising edge of TSCLK.
In UTOPIA L2 or L3 modes, TSOX indicates the first transfer of a cell.
In POS-PHY L2 or L3 modes, TSOX indicates the first transfer of a packet.
Transmit Selected Packet Available
This signal is tri-state when global reset is applied.
TSPA: In POS-PHY L2 or POS-PHY L3 modes, this signal is used to indicate the
selected port can accept data from the Link layer device. TSPA goes high when a
port is selected for transfer and it can accept more data than the "almost full" level.
TSPA goes low when the selected port is "full" or no port is selected. This signal is
FUNCTION