DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 328

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Transmit HEC Error Mask (THEM[7:0]) –These bits control the error insertion into the HEC byte.
Setting these bits will corrupt the associated HEC bit during cell error insertion. Based on the value set in this
register, the far end will detect three types of errors: an error in the HEC, a single bit error in the header, or multiple
bit errors in the header. Default (THEM[7:0] = 00h) is no error inserted. If a single bit error is selected, the table
below also shows which bit of the 32-bit HEC header will be corrupted.
inserted by a specific mask value. Note: If a single bit error is inserted in the HEC, and the far-end has single bit
error correction enabled, this will cause the indicated header bit to be corrupted.
THEM7
15
--
0
7
0
THEM6
14
--
0
6
0
CP.THMRC
Cell Processor Transmit HEC Error Mask Control Register
(1,3,5,7)A6h
THEM5
13
--
0
5
0
THEM4
12
--
0
0
4
THEM3
11
--
0
3
0
Table 12-48
THEM2
10
--
0
2
0
indicates the type of error
THEM1
--
9
0
1
0
THEM0
--
8
0
0
0