DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 160

IC TRPL ATM/PACKET PHY 400-PBGA

DS3163

Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3163

Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.10.3 Transmit Formatter
The Transmit Formatter receives a DS3, E3 or CC52 clear-channel data stream and performs framing generation,
error insertion, overhead insertion, and AIS/Idle generation for C-bit DS3, M23 DS3, G.751 E3, G.832 E3, or CC52
clear-channel framing protocols. In clear-channel mode, only AIS/Idle generation is performed.
The bits in a byte are transmitted MSB first, LSB last. When they are input serially, they are input in the order they
are to be transmitted. The bits in a byte in an outgoing signal are numbered in the order they are transmitted, 1
(MSB) to 8 (LSB). However, when a byte is stored in a register, the MSB is stored in the highest numbered bit (7),
and the LSB is stored in the lowest numbered bit (0). This is to differentiate between a byte in a register and the
corresponding byte in a signal.
After all frame formatting is completed, the frame processor inserts a DS3/E3 (or clear channel) data stream into a
line data stream (OHM modes only). The line data stream is an upper level signal with a DS3, E3, or clear-channel
data stream embedded within the upper level frame. E.g., if a DS3 signal has two line overhead/stuff periods occur
between the beginning of one frame, and the beginning of the next frame, there will be 4762 clock periods between
the beginning of the two frames (4760 for the DS3 data periods plus 2 for the line overhead/stuff periods).
10.10.4 Receive Framer
The Receive Framer receives the incoming DS3, E3, or clear-channel line/tributary data stream, performs
appropriate framing, terminates and extracts the associated overhead bytes, and extracts the DS3, E3, or clear-
channel payload data stream (OHM modes only). The line data stream is an upper level signal with a DS3, E3, or
clear-channel data stream embedded within the upper level frame. E.g., if a DS3 signal has two line overhead/stuff
periods occur between the beginning of one frame, and the beginning of the next frame, there will be 4762 clock
periods between the beginning of the two frames (4760 for the DS3 data periods plus 2 for the line overhead/stuff
periods).
The Receive Framer processes a C-bit format DS3, M23 format DS3, G.751 format E3, G.832 format E3, or clear-
channel data stream, performing framing, performance monitoring, overhead extraction, and generates
downstream AIS, if necessary.
generation are performed.
The bits in a byte are received MSB first, LSB last. When they are output serially, they are output MSB first, LSB
last. The bits in a byte in an incoming signal are numbered in the order they are received, 1 (MSB) to 8 (LSB).
However, when a byte is stored in a register, the MSB is stored in the highest numbered bit (7), and the LSB is
stored in the lowest numbered bit (0). This is to differentiate between a byte in a register and the corresponding
byte in a signal.
Some bits, bit groups, or bytes (data) are integrated before being stored in a register. Integration requires the data
to have the same new data value for five consecutive occurrences before the new data value will be stored in the
data register. Unless stated otherwise, integrated data may have an associated unstable indication. Integrated data
is considered unstable if the received data value does not match the currently stored (integrated) data value or the
previously received data value for eight consecutive occurrences. The unstable condition is terminated when the
same value is received for five consecutive occurrences.
10.10.4.1.1 Receive DS3 Framing
DS3 framing determines the DS3 frame boundary. In order to identify the DS3 frame boundary, first the subframe
boundary must be found. The subframe boundary is found by identifying the subframe alignment bits F
and F
boundary is found, the multiframe frame boundary can be found. The multiframe boundary is found by identifying
Detects alarms and errors – Detects DS3 alarm conditions (SEF, OOMF, OOF, LOF, COFA, AIS, AIC, RDI,
and Idle) and errors (framing, parity, and FEBE), or E3 alarm conditions (OOF, LOF, COFA, AIS, and RDI/RAI)
and errors (framing, parity, and REI).
Serial DS3/E3 overhead extraction port – Extracts all DS3 or E3 overhead and outputs it on a serial
interface.
HDLC overhead extraction – An HDLC channel can be extracted from the DS3 or E3 data stream.
FEAC extraction – A FEAC channel can be extracted from the DS3 or E3 data stream.
Trail Trace extraction – Extracts and outputs the G.832 E3 TR byte.
X4
, which have a value of one, zero, zero, and one respectively. See
In clear-channel mode, only performance monitoring and downstream AIS
Figure
10-38. Once the subframe
X1
, F
X2
, F
X3
,

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