DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 52

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RPOHCLKn
RCLKOn /
RGCLKn /
PIN
TYPE
O
bits. The RPOHSOFn signal marks the start of the framing bit sequence. This signal
is updated at the same time as the RPOHCLKn signal transitions high to low.
This signal can be inverted..
Receive Clock Output / Gapped Clock / PLCP Overhead Clock
See
RCLKOn: When the port is configured for external fractional mode or flexible
fractional mode and RCLKOn is selected, or any other mode and the port pins are
enabled and RCLKOn is selected, this clock output signal is active. It is the same as
the internal receive framer clock. This clock is typically used for the reference clock
for the RSERn, RSOFOn / RDENn / RFOHENOn, RPDATn, and RFOHENIn /
RPDENIn signals but can also be used as the reference for the RPOSn / RDATn,
RNEGn / RLCVn / ROHMIn TOHMIn / TSOFIn, TFOHn / TSERn, TFOHENIn,
TSOFOn / TDENn / TFOHENOn, TPOSn / TDATn and TNEGn / TOHMOn signals.
This signal can be inverted.
o
o
o
RGCLKn: When the port is configured for internal fractional or any simple DS3/E3
framed mode and the port pins are enabled and RGCLKn is selected, this gated clock
output signal is active. It is the internal receive framer clock gated by either RDENn or
RFOHENOn, depending on which signal is active. This clock is typically used as the
reference clock for the RSERn pin.
This signal can be inverted
RPOHCLKn: When the port framer is configured for one of the PLCP framing modes
and the port pins are enabled, this clock is used for the receive PLCP overhead port
signals RPOHn and RPOHSOFn. The RPOHSOFn and RPOHn output signals are
updated at the same time this clock signal transitions from high to low. The external
logic is expected to sample RPOHSOFn and RPOHn signal on the rising edge of this
clock signal. This clock is a low frequency clock.
This signal can be inverted.
DS3: 44.736 MHz +20 ppm
E3: 34.368 MHz +20 ppm
CC52: 52 MHz +20 ppm
Table 10-29.
FUNCTION