DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 45
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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TOHMOn
RPOSn /
RNEGn /
TNEGn /
RLCLKn
ROHMIn
RLCVn /
RDATn
PIN
TYPE
Iad
Iad
O
I
Transmit Negative AMI / Line OH Mask
TNEGn: When the port line is configured for B3ZS, HDB3 or AMI mode and the
framer is not configured for one of the “-OHM” modes (see
this pin indicates that a negative pulse should be transmitted on the line. The signal is
updated on the positive clock edge of the referenced clock pin if the clock pin signal is
not inverted, otherwise it is updated on the falling edge of the clock. The signal is
typically referenced to the TLCLKn line clock output pins, but it can be referenced to
the TCLKOn, TCLKIn, RLCLKn or RCLKOn pins.
This output signal can be inverted.
o
o
o
TOHMOn: When the framer is configured for one of the “-OHM” modes (see
10-30), the transmit overhead mask signal is output on this pin. This signal is a
delayed version of TOHMIn or ROHMIn when in local loopback (three clock period
delay). This signal will be high to indicate that the data on TDATn is not valid data
and can be overwritten by external logic to add an external frame signal. This signal
will be low to indicate that the data on TDATn is valid. The signal is updated on the
positive clock edge of the referenced clock pin if the clock pin signal is not inverted,
otherwise it is updated on the falling edge of the clock. The signal is typically
referenced to the TLCLKn line clock output pins, but it can be referenced to the
TCLKOn, TCLKIn, RLCLKn or RCLKOn pins.
This output signal can be inverted.
Receive Line Clock Input
RLCLKn: This clock is typically used for the reference clock for the RPOSn / RDATn,
RNEGn / RLCVn / ROHMIn signals but can also be used as the reference clock for
the RSERn, RSOFOn / RDENn / RFOHENOn, RFOHENIn, TOHMIn / TSOFIn,
TFOHn / TSERn, TFOHENIn, TSOFOn / TDENn / TFOHENOn, TPOSn / TDATn and
TNEGn / TOHMOn signals.
This input signal can be inverted.
o
o
o
Receive Positive AMI / Data
RPOSn: When the port line is configured for B3ZS, HDB3 or AMI mode and the
framer is not configured for one of the “-OHM” modes, a high on this pin indicates that
a positive pulse has been detected using an external LIU. The signal is sampled on
the positive clock edge of the referenced clock pin if the clock pin signal is not
inverted, otherwise it is sampled on the falling edge of the clock. The signal is typically
referenced to the RLCLKn line clock input pins, but it can be referenced to the
RCLKOn output pins.
This input signal can be inverted.
RDATn: When the port line interface is configured for UNI mode or the framer is
configured for one of the “-OHM” modes, the un-encoded receive signal is input on
this pin. The signal is sampled on the positive clock edge of the referenced clock pin if
the clock pin signal is not inverted, otherwise it is sampled on the falling edge of the
clock. The signal is typically referenced to the RLCLKn line clock input pins, but it can
be referenced to the RCLKOn output pins.
This input signal can be inverted.
o
o
o
Receive Negative AMI / Line Code Violation / Line OH Mask input
RNEGn: When the port line is configured for B3ZS, HDB3 or AMI mode and the
framer is not configured for one of the “-OHM” modes, a high on this pin indicates that
a negative pulse has been detected using an external LIU. The signal is sampled on
DS3: 44.736 Mbps +20ppm
E3: 34.368 Mbps +20ppm
CC52: 52 Mbps +20ppm
DS3: 44.736 MHz +20 ppm
E3: 34.368 MHz +20 ppm
CC52: 52 MHz +20 ppm
DS3: 44.736 Mbps +20ppm
E3: 34.368 Mbps +20ppm
CC52: 52 Mbps +20ppm
FUNCTION
Table
10-30), a high on
Table
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