MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1007

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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24.8.2.2
Indirect branches include interrupts, exceptions, and all taken branches whose destination is determined at
run time. For the RCPU, certain sequential instructions are tagged with the indirect change-of-flow
attribute because these instruction affect the machine in a similar manner to true indirect change-of-flow
instructions. These instructions are the rfi, isync, mtmsr and certain mtspr (to CMPA – CMPF, ICTRL,
ECR and DER)
The program trace indirect branch message has the following format:
For compressed code support, six additional bits indicate the starting bit address within the word of the
compressed instruction.
The program trace indirect branch with compressed code message has the format shown in
The format of the bit address field is shown in
Freescale Semiconductor
[6 bits]
TCODE (59)
RCPU
Bits
4:5
0:3
Indirect Branch Messages
On the MPC562/MPC564, the bit pointer should be multiplied by 2 (shift
left on bit) for the actual starting bit position.
MSB
[6 bits]
Figure 24-21. Indirect Branch Message Format with Compressed Code
5
TCODE (4)
Figure 24-22. Bit Pointer Format with Compressed Code
[1-8 bits]
Sequence Count
Nexus
Bits
0:1
2:5
Figure 24-20. Indirect Branch Message Format
4
MPC561/MPC563 Reference Manual, Rev. 1.2
Sequence Count
Max Length = 40 bits
Min Length = 14 bits
Table 24-26. Bit Pointer Format
Bit Pointer
Max Length = 37 bits
Min Length = 8 bits
[1 - 8 bits]
3
Name
BP
Figure
NOTE
[6 bits]
Bit Pointer
24-22. The bit definitions are shown in
2
Reserved (Unused)
Bit pointer. This value is 1/2 of the actual bit position on
which the instruction starts.
Relative Address
[1 - 23 bits]
1
[1-23 bits]
Reserved
Relative Address
Description
LSB
0
Figure
Table
READI Module
24-21.
24-26.
24-39

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