MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 790
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Modular Input/Output Subsystem (MIOS14)
17.10.6.4 MPWMSM Counter Register (MPWMCNTR)
The counter register reflects the actual value of the MPWMSM counter.
This register is writable only through the period register (PWMPERR). Writes to the counter register will
write the same value to the period register.
17.10.6.5 MPWMSM Status/Control Register (MPWMSCR)
The status and control register gathers read only bits reflecting the status of the MPWMSM signal as well
as read/write bits related to its control and configuration.
17-58
SRESET
SRESET
SRESET
Bits
0:15
Bits
0:15
Field
Addr 0x30 6002, 0x30 600A, 0x30 6012, 0x30 601A, 0x30 6022, 0x30 602A, 0x30 6082, 0x30 608A, 0x30 6092,
Field
Field PIN
Addr 0x30 6004, 0x30 600C, 0x30 6014, 0x30 601C, 0x30 6024, 0x30 602C, 0x30 6084, 0x30 608C, 0x30 6094,
Addr 0x30 6004, 0x30 600C, 0x30 6014, 0x30 601C, 0x30 6024, 0x30 602C, 0x30 6084, 0x30 608C, 0x30 6094,
MSB
MSB
MSB
Name
Name
U
0
0
CNT
0
PUL
DDR FREN TRSP POL
1
1
1
Pulse width. These bits contain the binary value of the pulse width to be generated.
Counter. These bits reflect the actual value of the MPWMSM counter.
Figure 17-29. MPWMSM Status/Control Register (MPWMSCR)
Figure 17-27. MPWMSM Pulse Width Register (MPWMPULR)
Figure 17-28. MPWMSM Counter Register (MPWMCNTR)
2
2
2
000_00
3
3
Table 17-27. MPWMPULR Bit Descriptions
Table 17-28. MPWMCNTR Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
3
4
4
4
0x30 609A, 0x30 60A2, 0x30 60AA
0x30 609C, 0x30 60A4, 0x30 60AC
5
0x30 609C, 0x30 60A4, 0x30 60AC
5
EN
5
6
6
6
Undefined
—
Undefined
7
7
PUL
CNT
7
Description
Description
8
8
8
9
9
9
10
10
Undefined
10
11
11
11
CP
12
12
12
Freescale Semiconductor
13
13
13
14
14
14
LSB
LSB
LSB
15
15
15
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