MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1057

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

25.1.2
To enable JTAG on reset for board test JCOMP/RSTI must be high on PORESET rising edge as shown in
Figure
Freescale Semiconductor
JCOMP/RSTI
25-3.
PORESET
Configuration
PORESET / TRST
Entering JTAG Mode
JCOMP / RSTI
JTAG puts all output pins in fast slew rate mode. Enough current cannot be
supplied to allow all the pins to be switched simultaneously, so this should
be avoided.
TDO
TMS
TCK
TDI
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 25-2. Test Logic Block Diagram
JTAG
Figure 25-3. JTAG Mode Selection
Instruction apply & decode register
3
Bypass
4-bit Instruction register
Boundary scan register
JTAG ON
TAP Controller
NOTE
2
TRST
1
0
JTAG off/READI Config
IEEE 1149.1-Compliant Interface (JTAG)
M
U
X
M
U
X
T
25-3