MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 696

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

CAN 2.0B Controller Module
16.2
Each TouCAN module interface to the external CAN bus consists of two signals: CNTX0 which transmits
serial data, and CNRX0 which receives serial data.
16-2
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— Zero to eight bytes data length
— Programmable bit rate up to one Mbit/sec
16 Rx/Tx message buffers of 0-8 bytes data length
Content-related addressing
No read/write semaphores required
Three programmable mask registers: global (for message buffers 0 through 13), special for
message buffer 14, and special for message buffer 15
Programmable transmit-first scheme: lowest ID or lowest buffer number
“Time stamp”, based on 16-bit free-running timer
Global network time, synchronized by a specific message
Programmable I/O modes
Maskable interrupts
Independent of the transmission medium (external transceiver is assumed)
Open network architecture
Multimaster concept
High immunity to EMI
Short latency time for high-priority messages
Low power sleep mode with programmable wakeup on bus activity
Outputs have open drain drivers
Support for SAE J1939 and SAE J2284
Support for DeviceNet™ and Smart Distributed System
External Signals
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor