MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 753

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

17.8.1.1
The MMCSM has two dedicated external signals.
An external modulus load signal (MMCnL) allows the modulus value stored in the modulus latch register
(MMCSMML) to be loaded into the up-counter register (MMCSMCNT) at any time. Both rising and
falling edges of the load signal may be used, according to the EDGEP and EDGEN bit settings in the
MMCSMSCR.
An external event clock signal (MMCnC) can be selected as the clock source for the up-counter register
(MMCSMCNT) by setting the appropriate value in the CLS bit field of the status/control register
(MMCSMSCR). Either rising or falling edge may be used according to the setting of these bits.
When the external clock source is selected, the MMCSM is in the event counter mode. The counter can
simply counts the number of events occurring on the input signal. Alternatively, the MMCSM can be
programmed to generate an interrupt when a predefined number of events have been counted; this is done
by presetting the counter with the two’s complement value of the desired number of events.
17.8.2
The built-in prescaler consists of an 8-bit modulus counter, clocked by the MCPSM output. It is loaded
with an 8-bit value every time the counter overflows or whenever the prescaler output is selected as the
clock source. This 8-bit value is stored in the MMCSMSCR[CP]. The prescaler overflow signal is used to
clock the MMCSM up-counter. This allows the MMCSMCNT to be incremented at the MCPSM output
frequency divided by a value between 1 and 256.
17.8.3
Freescale Semiconductor
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Time counter on internal clock with interrupt capability after a pre-determined time
External event counter (pulse accumulator) with overflow and interrupt capability after a
pre-determined number of external events
Usable as a regular free-running up-counter
Capable of driving a dedicated 16-bit counter bus to provide timing information to action
submodules (the value driven is the contents of the 16-bit up-counter register)
Optional signal for counting external events
Optional signal to externally force a load of the modulus counter
The MMCSM is connected to all the signals in the read/write and control bus, to allow data transfer
from and to the MMCSM registers, and to control the MMCSM in the different possible situations.
The MMCSM drives a dedicated 16-bit counter bus with the value currently in the up-counter
register
The MMCSM uses the request bus to transmit the FLAG line to the interrupt request submodule
(MIRSM). A flag is set when an overflow has occurred in the up-counter register.
MMCSM Prescaler
Modular I/O Bus (MIOB) Interface
MMCSM Signal Functions
MPC561/MPC563 Reference Manual, Rev. 1.2
Modular Input/Output Subsystem (MIOS14)
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