MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1194

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

TPU3 ROM Functions
D.15 Output Compare (OC)
The output compare (OC) function generates a rising edge, falling edge, or a toggle of the previous edge:
immediately upon RCPU initiation (generating a pulse with a length equal to a programmable delay time),
after a programmable delay time, or continuously. Upon receiving a link from a channel, OC references,
without RCPU interaction, a specifiable period and calculates an offset that is equal to the period
the
x
ratio, where the ratio is a supplied parameter.
This algorithm generates, with each high/low time, a 50% duty-cycle continuous square equal to the
calculated offset. Due to offset calculation, there is an initial link time before continuous pulse generation
begins. See Freescale TPU Progamming Note Output Compare TPU Function (OC), (TPUPN12/D).
Figure D-26
shows the host interface areas and parameter RAM for the OC function.
MPC561/MPC563 Reference Manual, Rev. 1.2
D-42
Freescale Semiconductor