MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 22

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

16.7.14
16.7.15
17.1
17.2
17.2.1
17.2.2
17.3
17.3.1
17.3.2
17.3.3
17.3.4
17.3.5
17.4
17.4.1
17.4.2
17.5
17.6
17.6.1
17.6.1.1
17.6.1.2
17.6.1.3
17.6.1.4
17.7
17.7.1
17.7.1.1
17.7.1.2
17.7.2
17.7.3
17.7.3.1
17.7.3.2
17.8
17.8.1
17.8.1.1
17.8.2
17.8.3
17.8.4
17.8.5
Freescale Semiconductor
Paragraph
Number
Block Diagram .............................................................................................................. 17-1
MIOS14 Key Features .................................................................................................. 17-3
MIOS14 Configuration ................................................................................................. 17-6
MIOS14 Programming Model .................................................................................... 17-10
MIOS14 I/O Ports ....................................................................................................... 17-13
MIOS14 Bus Interface Submodule (MBISM) ............................................................ 17-13
MIOS14 Counter Prescaler Submodule (MCPSM) .................................................... 17-16
MIOS14 Modulus Counter Submodule (MMCSM) ................................................... 17-19
Interrupt Flag Register (IFLAG) ............................................................................. 16-36
Error Counters (RXECTR, TXECTR) .................................................................... 16-36
Submodule Numbering, Naming, and Addressing ................................................... 17-4
Signal Naming Convention ....................................................................................... 17-5
MIOS14 Signals ........................................................................................................ 17-9
MIOS14 Bus System ................................................................................................ 17-9
Read/Write and Control Bus ................................................................................... 17-10
Request Bus ............................................................................................................ 17-10
Counter Bus Set ...................................................................................................... 17-10
Bus Error Support ................................................................................................... 17-10
Wait States .............................................................................................................. 17-11
MIOS14 Bus Interface (MBISM) Registers ........................................................... 17-13
MCPSM Features .................................................................................................... 17-16
Effect of RESET on MCPSM ................................................................................. 17-17
MCPSM Registers .................................................................................................. 17-17
MMCSM Features .................................................................................................. 17-20
MMCSM Prescaler ................................................................................................. 17-21
Modular I/O Bus (MIOB) Interface ........................................................................ 17-21
Effect of RESET on MMCSM ................................................................................ 17-22
MMCSM Registers ................................................................................................. 17-22
MIOS14 Test and Signal Control Register (MIOS14TPCR) ............................. 17-13
MIOS14 Vector Register (MIOS14VECT) ........................................................ 17-14
MIOS14 Module and Version Number Register (MIOS14VNR) ...................... 17-14
MIOS14 Module Configuration Register (MIOS14MCR) ................................. 17-15
MCPSM Signal Functions .................................................................................. 17-17
Modular I/O Bus (MIOB) Interface .................................................................... 17-17
MCPSM Registers Organization ........................................................................ 17-17
MCPSM Status/Control Register (MCPSMSCR) .............................................. 17-18
MMCSM Signal Functions ................................................................................. 17-21
Modular Input/Output Subsystem (MIOS14)
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Chapter 17
Title
Number
Page
xxii