MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 988

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

READI Module
24.6.5
The following programing guidelines are recommended for users of the READI features.
24.6.5.1
Program trace via BTM is not supported during BDM.
For program trace synchronization to work, the ICTRL register (Refer to
programmed such that show cycles will be performed for all changes in the program flow (ISCTL field =
0b01) or the PTM bit in the READI MC register must be set and the ISCTL field in the ICTRL register
must not equal 0b11.
If BDM is enabled, the ICTRL register cannot be modified through the program and can only be modified
through RCPU development access.
To get the best performance from the system, PTM should be set to 1 and ISCTL should be set to 0b10. It
is also recommended that the USIU be programmed to ignore instruction show cycles (so as to not impact
U-bus performance). See
To correctly trace program execution using BTM, the READI module must be enabled prior to release of
system reset. If the READI module is enabled (EVTI asserted, RSTI negated) after the RCPU has started
execution of the program, the trace cannot be guaranteed. Refer to
24.6.5.2
To display data on instruction show cycles, the BBC must be enabled. BBCMCR[DECOMP_SC_EN]
(refer to
decompression is enabled. This will allow READI to track the compressed code.
BBCMCR[DECOMP_SC_EN] should not be set if there is no intention to use compressed code, as it will
degrade U-bus performance.
Refer to
information.
The ICTRL register must be programmed such that a show cycle will be performed for all changes in the
program flow (ISCTL field = 0b01), or the PTM bit must be set and ISCTL must be set to a value other
than 0b11. (See
24.7
This section details information regarding the READI signals and signal protocol.
24-20
Section 4.6.2.1, “BBC Module Configuration Register
Appendix A, “MPC562/MPC564 Compression
Signal Interface
Programming Considerations
Program Trace Guidelines
Compressed Code Mode Guidelines
The user must program the ICTRL for change of flow show cycles or the
PTM bit in the READI MC register early in the reset vector, before any
branches, otherwise trace is not guaranteed.
Table
23-26.)
Section 6.2.2.1.1, “SIU Module Configuration Register
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
Features” for MPC562/MPC564 compression
(BBCMCR)”) must be set when
Figure 24-16
Table
23.6.11)must be
for further details.
(SIUMCR).”
Freescale Semiconductor