MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1169

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

D.8
The COMM function generates phase commutation signals for a variety of brushless motors, including
three-phase brushless direct current motors. It derives the commutation state directly from the position
decoded in FQD, eliminating the need for hall effect sensors.
The state sequence is implemented as a user-configurable state machine, providing a flexible approach
with other general applications. A RCPU offset parameter is provided to allow the RCPU to advance or
retard all swtiching angles on the fly. This feature is useful for torque maintenance at high speeds. See
Freescale TPU Progamming Note Multiphase Motor Commutation TPU Function (COMM),
(TPUPN09/D).
Figure D-10
Freescale Semiconductor
Multiphase Motor Commutation (COMM)
and
Figure D-10
show all of the host interface areas for the COMM function.
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure D-9. NITC Parameters
CONTROL BITS
See
PRAM Address Offset Map.
Table 19-24
for the
TPU3 ROM Functions
D-17