MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 231

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

4.6.2.5
4.6.3
See
ICDU.
Freescale Semiconductor
,
HRESET
Section A.4, “Decompressor Class Configuration Registers
21:31
Table 4-9. EIBADR External Interrupt Relocation Table Base Address Register Bit Descriptions
Bits
0:20
Field
Decompressor Class Configuration Registers
MSB
Figure 4-11. External Interrupt Relocation Table Base Address Register (EIBADR)
0
External Interrupt Relocation Table Base Address Register (EIBADR)
Name
BA
—
1
2
3
External Interrupt Relocation Table Base Address bits [0:20]
Reserved. EIBADR must be set on a 4K page boundary.
4
5
6
7
MPC561/MPC563 Reference Manual, Rev. 1.2
8
Unchanged
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
BA
Description
(DCCR0-15)” for the registers of the
Burst Buffer Controller 2 Module
000_0000_0000
—
LSB
31
4-25