MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 218

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Burst Buffer Controller 2 Module
4.4
Decompressor RAM (DECRAM) is a part of the ICDU. It occupies a 2-Kbyte physical RAM array block.
It is mapped both in the ICDU internal address space and in the chip memory address space. It is a single
port memory and may not be accessed simultaneously from the ICDU and U-bus.
4-12
0x500
Decompressor RAM (DECRAM) Functionality
Relocation Table
Base Address
Interrupt
External
(EIBADR)
External Interrupt
Vector Relocator
Figure 4-3. External Interrupt Vectors Splitting
Interrupt
MPC561/MPC563 Reference Manual, Rev. 1.2
Vector
Offset
EIBADR
Interrupt Code
from Interrupt
Controller
000
Branch absolute to handler
Branch absolute to handler
Branch absolute to handler
Branch absolute to handler
Branch absolute to handler
Internal Memory Structure
Main code can start here
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