MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 670

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Queued Serial Multi-Channel Module
Frame
Data frame
Idle frame
Break frame
15.7.7.2
All data frames must have a start bit and at least one stop bit. Receiving and transmitting devices must use
the same data frame format. The SCI provides hardware support for both 10-bit and 11-bit frames. The M
bit in SCCxR1 specifies the number of bits per frame.
The most common data frame format for NRZ (non-return to zero) serial interfaces is one start bit, eight
data bits (Lsb first), and one stop bit (ten bits total). The most common 11-bit data frame contains one start
bit, eight data bits, a parity or control bit, and one stop bit. Ten-bit and 11-bit frames are shown in
Table
15.7.7.3
The SCI baud rate is programmed by writing a 13-bit value to the SCxBR field in SCI control register zero
(SCCxR0). The baud rate is derived from the MCU IMB3 clock by a modulus counter. Writing a value of
zero to SCxBR[12:0] disables the baud rate generator. The baud rate is calculated as follows:
15-52
1
The MSB data bit can also serve as a second STOP bit. By setting this bit permanently to one, communication with
other SCIs requiring two STOP bits could be accommodated.
15-29.
Start
Start
1
1
1
1
1
1
Serial Formats
Baud Clock
A start bit, a specified number of data or information bits, and at least one stop bit.
A frame that consists of consecutive ones. An idle frame has no start bit.
A frame that consists of consecutive zeros. A break frame has no stop bits.
A complete unit of serial information. The SCI can use 10-bit or 11-bit frames.
Data
Data
7
7
8
8
8
9
11-Bit Frames
10-bit Frames
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 15-29. Serial Frame Formats
Parity/Control
Parity/Control
SCI Baud Rate
1
1
or
=
----------------------------- -
32xSCxBR
f SYS
STOP
STOP
2
2
1
1
1
1
1
M
M
0
0
0
1
1
1
SCCxR1 Bits
SCCxR1 Bits
Freescale Semiconductor
PE
PE
0
1
0
1
1
0
Eqn. 15-4

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