MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1071
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
BSDL
BSDL
417
418
419
420
421
422
Bit
Bit
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
0
1
2
3
4
5
6
7
8
9
BC_2
BC_2
BC_2
BC_2
BC_2
BC_7
Type
BC_2
BC_7
BC_2
BC_2
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
BC_7
BC_2
Cell
Type
Cell
SGPIOC6_FRZ_PTR_B
Table 25-1. MPC561 Boundary Scan Bit Definition (continued)
Pin/Port Name
IWP0_VFLS0
IWP1_VFLS1
Pin/Port Name
B_TPUCH0
B_TPUCH1
B_TPUCH2
B_TPUCH3
B_TPUCH4
B_TPUCH5
B_TPUCH6
B_TPUCH7
B_TPUCH8
B_TPUCH9
B_CNRX0
B_CNTX0
Table 25-2. MPC563 Boundary Scan Bit Definition
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
MPC561/MPC563 Reference Manual, Rev. 1.2
Function
Function
internal
output2
internal
output2
controlr
controlr
output2
controlr
controlr
controlr
controlr
controlr
controlr
controlr
controlr
controlr
controlr
controlr
internal
BSDL
bidir
BSDL
bidir
bidir
bidir
bidir
bidir
bidir
bidir
bidir
bidir
bidir
bidir
Safe
Valu
Value
Safe
e
1
1
1
1
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Contro
Cell
Contro
421
Cell
l
10
12
14
16
18
20
22
0
4
6
8
l
Disable
Value
Disable
Value
0
0
0
0
0
0
0
0
0
0
0
0
IEEE 1149.1-Compliant Interface (JTAG)
Disable
Result
Disabl
Result
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
e
Function
Functio
Pin
Pin
IO
O
O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
n
26v5vs
Type
5vsa
5vsa
5vsa
5vsa
5vsa
5vsa
5vsa
5vsa
5vsa
5vsa
Type
Pad
5vfa
5vfa
Pad
26v
26v
25-17
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