MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 114

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Signal Descriptions
2-16
MPWM1 / MDO2
MPWM2 / PPM_TX1
MPWM3 / PPM_RX1
MPWM16
MPWM17 / MDO3
MPWM[18:19] / MDO[6:7]
Signal Name
Table 2-1. MPC561/MPC563 Signal Descriptions (continued)
Signals
No. of
1
1
1
1
1
2
MPC561/MPC563 Reference Manual, Rev. 1.2
Type
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
MPWM1 unless
the Nexus
(READI) port is
enabled, then
MDO2.
See
MPWM2
MPWM3
MPWM16
MPWM17
unless the
Nexus (READI)
port is enabled.
See
MPWM[18:19]
Function after
Section
Section
Reset
1
2.5.
2.5.
Pulse Width Modulation 1. This signal provides a variable
pulse width output signal at a wide range of frequencies.
READI Message Data Out. Message data out (MDO2) is an
output signal used for uploading OTM, BTM, DTM, and
read/write accesses. External latching of MDO occurs on
the rising edge of MCKO. Eight MDO signals are
implemented.
Pulse Width Modulation 2. This signal provides a variable
pulse width output signal at a wide range of frequencies.
PPMTX1. Transmit data from PPM channel number 1.
Pulse Width Modulation 3. This signal provides a variable
pulse width output signal at a wide range of frequencies.
PPMRX1. Receive data to the PPM channel number 1.
Pulse Width Modulation 16. This signal provides a variable
pulse width output at a wide range of frequencies.
Clock Input: MPWM16 can provide a clock input to modulus
clock submodule, MMCSM8
Pulse Width Modulation 17. This signal provides variable
pulse width outputs at a wide range of frequencies.
Load Input: PWM17 can provide a load input to modulus
clock submodule, MMCSM8
READI Message Data Out. Message data out (MDO3) is an
output signal used for uploading OTM, BTM, DTM, and
read/write accesses. External latching of MDO occurs on
rising edge of MCKO. Eight MDO signals are implemented.
Pulse Width Modulation [18:19]. These signals provide
variable pulse width output signals at a wide range of
frequencies.
Clock and Load Input:
READI Message Data Out. Message data out (MDO[6:7])
are output signals used for uploading OTM, BTM, DTM, and
read/write accesses. External latching of MDO occurs on
rising edge of MCKO. Eight MDO signals are implemented.
• MPWM18 can provide clock inputs to modulus counter
• MPWM19 can provide load inputs to modulus counter
submodule MMCSM24
submodule MMCSM24
Description
Freescale Semiconductor