MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1279

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Note: (T
Following are PPM timing diagrams.
Freescale Semiconductor
PPM_TSYNC
1
2
3
PPM_TX[0:1]
PPM_TCLK
PPM_TCLK
139 Rise Time
140 Fall Time
Nu
m
All AC timing is tested to the 2.6-V levels outlined in <XrefBlue>Table F.5 on page F-7.
Although the PPM permits frequencies of up to f
at frequencies above f
TC is defined to be the clock period.
A
= T
Input
Output –
2.6V PPM pads (PDMCR2[PPMV] = 0)
5V PPM pads (PDMCR2[PPMV] = 1)
Input
Output –
2.6V PPM pads (PDMCR2[PPMV] = 0)
5V PPM pads (PDMCR2[PPMV] = 1)
L
to T
H
, 50 pF Load on all Pins)
SYS
/8 for EMI/EMC reasons.
Figure F-46. PPM Data Transfer Timing (SPI Mode)
MPC561/MPC563 Reference Manual, Rev. 1.2
Rating
Table F-22. PPM Timing (continued)
Figure F-45. PPM_TCLK Timing
SYS
/2, if the 5-V bus is selected the bus frequency should not be run
Symbol
t
t
t
t
RO
FO
HI
FI
Min
Electrical Characteristics
Max
15
15
1
7
1
7
Unit
µs
ns
ns
µs
ns
ns
F-63

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