MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 735
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MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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17.2
The basic features of the MIOS14 are as follows:
Freescale Semiconductor
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Modular architecture at the silicon implementation level
Disable capability in each submodule to allow power saving when its function is not needed
Six 16-bit counter buses to allow action submodules to use counter data
When not used for timing functions, every channel signal can be used as a port signal: I/O, output
only or input only, depending on the channel function.
Submodules’ signal status bits reflect the status of the signal
MIOS14 counter prescaler submodule (MCPSM):
— Centralized counter clock generator
— Programmable 4-bit modulus down-counter
— Wide range of possible division ratios: 2 through 16
— Count inhibit under software control
MIOS14 modulus counter submodule (MMCSM):
— Programmable 16-bit modulus up-counter with built-in programmable 8-bit prescaler clocked
— Maximum increment frequency of the counter:
— Flag setting and possible interrupt generation on overflow of the up-counter
— Time counter on internal clock with interrupt capability after a pre-determined time
— Optional signal usable as an external event counter (pulse accumulator) with overflow and
— Usable as a regular free-running up-counter
— Capable of driving a dedicated 16-bit counter bus to provide timing information to action
— Optional signal to externally force a load to the counter with modulus value
MIOS14 double action submodule (MDASM):
— Versatile 16-bit dual action unit allowing two events to occur before software intervention is
— Six software selectable modes allowing the MDASM to perform pulse width and period
— Software selection of one of the six possible 16-bit counter buses used for timing operations
— Flag setting and possible interrupt generation after MDASM action completion
— Software selection of output pulse polarity
— Software selection of totem-pole or open-drain output
— Software readable output signal status
MIOS14 Key Features
by MCPSM output.
– Clocked by the internal MCPSM output: f
– Clocked by the external signal: f
interrupt capability after a pre-determined number of external events.
submodules (the value driven is the contents of the 16-bit up-counter register)
required
measurements, PWM generation, single input capture and output compare operations as well
as port functions
MPC561/MPC563 Reference Manual, Rev. 1.2
SYS
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Modular Input/Output Subsystem (MIOS14)
17-3
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