MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 976

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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READI Module
24.6
The READI registers do not follow the recommendations of the IEEE-ISTO 5001 - 1999, but are loosely
based on the 0.9 release of the standard. See
READI registers are classified into two categories: user-mapped register and tool-mapped registers.
User-mapped register (a memory-mapped register):
Tool-mapped registers (registers which can be accessed only through the development tool and are not
memory mapped):
24.6.1
READI registers are accessible via the auxiliary port. They can be classified into two categories:
user-mapped registers and tool-mapped registers.
24.6.1.1
The operating system writes the ID for the current task/process in the single user-mapped register, the
READI ownership trace (OTR) register.
are explained below.
The current task/process (CTP) field is updated by the operating system software to provide task/process
ID information. The OTR register can only be accessed by supervisor data attributes. Only CPU writes to
this register will be transmitted. This register is not accessible via the auxiliary port download request
message.
24-8
Ownership trace register
Device ID register
Development control register
Mode control register 4-bit
User base address register
Read/write access register
Upload/download information register
Data trace attributes register 1
Data trace attributes register 2
Programming Model
Register Map
User-Mapped Register (OTR)
This is the only READI register that is reset by HRESET.
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 24-4
http://www.nexus5001.org/
NOTE
shows the location of the register bits. Their functions
.
Freescale Semiconductor

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