MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 51

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

17-32
17-33
17-34
17-35
17-36
17-37
17-38
17-39
17-40
17-41
17-42
17-43
17-44
17-45
17-46
18-1
18-2
18-3
18-4
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18-9
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18-14
18-15
18-16
18-17
18-18
18-19
18-20
18-21
18-22
18-23
18-24
18-25
Freescale Semiconductor
Figure
Number
MPIOSM Data Register (MPIOSMDR)............................................................................... 17-62
MPIOSM Data Direction Register (MPIOSMDDR)............................................................ 17-63
MIOS14 Interrupt Structure.................................................................................................. 17-64
Interrupt Status Register (MIOS14SR0)............................................................................... 17-66
Interrupt Enable Register (MIOS14ER0) ............................................................................. 17-66
Interrupt Request Pending Register (MIOS14RPR0) ........................................................... 17-67
Interrupt Status Register (MIOS14SR1)............................................................................... 17-67
Interrupt Enable Register (MIOS14ER1) ............................................................................. 17-68
Interrupt Request Pending Register (MIOS14RPR1) ........................................................... 17-68
MIOS14 Interrupt Level Register 0 (MIOS14LVL0)........................................................... 17-69
MIOS14 Interrupt Level Register 1 (MIOS14LVL1)........................................................... 17-70
MIOS14 Example: Double Capture Pulse Width Measurement .......................................... 17-71
MIOS14 Example: Double Capture Period Measurement ................................................... 17-72
MIOS14 Example: Double Edge Output Compare .............................................................. 17-73
MIOS14 Example: Pulse Width Modulation Output............................................................ 17-74
N-Signal I/O Compared with PPM I/O................................................................................... 18-2
Block Diagram of PPM Module ............................................................................................. 18-4
Internal Multiplexer Mechanism for Transmit Data............................................................... 18-5
Internal Multiplexer Mechanism for Received Data .............................................................. 18-5
PPM Clocks and Serial Data Signals ...................................................................................... 18-6
One Transmit and Receive Cycle in SPI Mode ...................................................................... 18-7
Examples Of Several TCLK Frequencies and Sample Rates ................................................. 18-8
Module Configuration Register (PPMMCR)........................................................................ 18-10
PPM Control Register (PPMPCR)........................................................................................ 18-12
Set ENRX While ENTX = 1................................................................................................. 18-14
Set ENTX while ENRX = 1.................................................................................................. 18-14
SPI Transfer Format with CP = 0 ......................................................................................... 18-15
SPI Transfer Format with CP = 1 ......................................................................................... 18-15
Transmit Configuration Register 1 (TX_CONFIG_1) ......................................................... 18-16
Transmit Configuration Register 2 (TX_CONFIG_2) ......................................................... 18-16
Receive Configuration Register 1 (RX_CONFIG_1)........................................................... 18-16
Receive Configuration Register 2 (RX_CONFIG_2)........................................................... 18-17
Receive Data Register (RX_DATA) .................................................................................... 18-18
Receive Shifter Register (RX_SHIFTER) ............................................................................ 18-18
Transmit Data Register (TX_DATA) ................................................................................... 18-18
General Purpose Data Out Register (GPDO) ....................................................................... 18-19
General Purpose Data In Register (GPDI)............................................................................ 18-19
Short Register (SHORT_REG)............................................................................................. 18-19
Example of TouCAN Internal Short with SH_TCAN = 0b110............................................ 18-21
Short Between TPU Channels .............................................................................................. 18-22
MPC561/MPC563 Reference Manual, Rev. 1.2
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