MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 821

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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18.4.3
The two transmit configuration registers control which internal modules will transmit data through the
PPM. Each of the configuration registers contains eight separate 2-bit wide bit fields. Each of the 16 fields
controls a multiplexer that selects a 1-bit channel from an internal module to the PPM transmit data
register. See
Freescale Semiconductor
PPM_TSYNC
PPM_TSYNC
PPM_TCLK
PPM_TCLK
PPM_TCLK
PPM_TCLK
PPMPCR[CM]
DATA
DATA
Transmit Configuration Registers (TX_CONFIG_1 and
TX_CONFIG_2)
Table 18-6
X
0
0
1
CI = 0
CI = 1
CI = 0
CI = 1
Table 18-5. PPMPCR[CM] and PPMPCR[STR] Bit Operation
for more information on channel control and setting the channel values.
PPMPCR[STR]
Figure 18-12. SPI Transfer Format with CP = 0
Figure 18-13. SPI Transfer Format with CP = 1
MPC561/MPC563 Reference Manual, Rev. 1.2
X
X
1
0
One data frame transmitted and/or received through PPM.
Transfer of one data frame completed.
Continuously transmit and/or receive data frames through PPM.
CM and STR will only effect PPM transmit/receive when PPM is
configured for SPI mode. In TDM mode transmit/receive will be
continuous regardless of the values of CM and STR bits.
Result
Peripheral Pin Multiplexing (PPM) Module
18-15

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