MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 394

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

External Bus Interface
9-54
4. Assert Transfer Start (TS)
1. Release Bus Request (BR) for One Clock and Request Bus (BR) Again
2. Wait Until Bus Busy Negated (No Other Master is Driving)
3. Assert Bus Busy (BB)
5. Drives Address and Attributes
1. Request Bus (BR)
2. Receives Bus Grant (BG) from Arbiter
3. Asserts Bus Busy (BB) if No Other Master is Driving
4. Assert Transfer Start (TS)
5. Drives Address and Attributes
Figure 9-39. Flow of Retry of External Master Read Access
External Master
1. Receives Data
MPC561/MPC563 Reference Manual, Rev. 1.2
1. Asserts Transfer Acknowledge (TA)
Address in Internal
MPC500 Device
1. Assert Retry
1. Receives Address
1. Returns Data
Memory Map
Yes
Freescale Semiconductor
Asserts CSx
If In Range
Memory
Controller
No