MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 314

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Clocks and Power Control
The system clocks GCLK1 and GCLK2 frequency is:
Therefore, the complete equation for determining the system clock frequency is:
8-12
System Frequency=
where FREQsysmax = VCOOUT/2
CLKOUT does not have a 50% duty cycle when the general system clock is
divided. The CLKOUT wave form is the same as that of GCLK2_50.
GCLK1 Divide by 1
GCLK2 Divide by 1
GCLK1 Divide by 2
GCLK2 Divide by 2
GCLK1 Divide by 4
GCLK2 Divide by 4
Figure 8-6. Divided System Clocks Timing Diagram
OSCCLK
DIVF + 1
MPC561/MPC563 Reference Manual, Rev. 1.2
FREQ sys
x
=
------------------------------------------------------------------ -
(
(2 DNFH ) or (2 DFNL + 1)
2
NOTE
DFNH
FREQsysmax
(MF + 1)
)or 2
(
DFNL
+
1
)
x
2
2
Freescale Semiconductor

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