MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 224

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Burst Buffer Controller 2 Module
All the above registers may be accessed in the supervisor mode only. An exception is internally generated
by the RCPU if there is an attempt to access them in user mode. An external master receives a transfer
error acknowledge when attempting to access a register in user mode.
4.6.1.2
The DECRAM occupies addresses from 0x2F 8000 to 0x2F 87FF. The DCCR block occupies addresses
from 0x2F A000 to 0x2F A03F.
The address for non-implemented memory blocks is not acknowledged, and causes an error condition.
4-18
SPR Number
(Decimal)
784
785
786
787
816
817
818
819
DECRAM and DCCR Block
If one of these registers is written within 4 instructions of a branch target,
the user application may crash. To prevent this, ensure that any instruction
writing to these registers is preceded by 4 instructions that are not the target
of any branch, and is followed by an isync instruction.
Access (Hex)
Address for
External
0x2180
0x2380
0x2580
0x2780
0x2190
0x2390
0x2590
0x2790
Master
IMPU Region Base Address Register 0 (MI_RBA0). See
descriptions.
IMPU Region Base Address Register 1 (MI_RBA1). See
descriptions.
IMPU Region Base Address Register 2 (MI_RBA2). See
descriptions.
IMPU Region Base Address Register 3 (MI_RBA3). See
descriptions.
IMPU Region Attribute Register 0 (MI_RA0). See
IMPU Region Attribute Register 1 (MI_RA1). See
IMPU Region Attribute Register 2 (MI_RA2). See
IMPU Region Attribute Register 3 (MI_RA3). See
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 4-3. BBC SPRs (continued)
NOTE
Register Name
Table 4-6
Table 4-6
Table 4-6
Table 4-6
Table 4-5
Table 4-5
Table 4-5
Table 4-5
for bits descriptions.
for bits descriptions.
for bits descriptions.
for bits descriptions.
Freescale Semiconductor
for bits
for bits
for bits
for bits