MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1054

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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READI Module
24.15 Power Management
This section details the power management features of the READI module.
The READI module is a development interface, and is not expected to function under normal
(non-development) conditions. Therefore power management is required to reduce and minimize power
consumption during normal operation of the part.
24.15.1 Functional Description
The following are the candidates for power management:
24.15.2 Low Power Modes
When the MCU is in sleep, deep-sleep, or low power-down mode, all internal clocks on the MCU are shut
down, including the MCKO. The MSEO signal will be held negated.
Low power mode entry for the MCU will be held off until the READI module has transmitted all existing
messages (in the queues and transmit buffers). During this time, input messages from the development tool
are ignored.
Upon restoration of clocks in normal mode, program and data traces will be synchronized, if enabled.
24-86
TCODE = 57 (0x39)
Header = (Start=0, Mode=0, Control=0)
Data = FF00AAF5 (CPU Data Out)
MCKO
MSEO
MDO[7:0]
Low Power-Down Mode
Sleep, Deep-Sleep and
READI Reset (RSTI)
Disabled Mode
Feature
Table 24-35. Power Management Mechanism Overview
Figure 24-89. DSDO Data Message (CPU Data Out)
00111001
MPC561/MPC563 Reference Manual, Rev. 1.2
11111110
If EVTI is negated at negation of RSTI, the READI module will be
disabled. No trace output will be provided, and output auxiliary port
will be three-stated.
All outputs will be held static.
Output auxiliary signals will be three-stated.
00000001 10101010 01011110 00000001 00000000
Power Saving Mechanism
Don’t care data
(idle clock)
Freescale Semiconductor

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