MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 724

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

CAN 2.0B Controller Module
16.7.7
16-30
10:12
13:15
SRESET
Bits
8:15
Bits
0:7
0:7
8:9
Field
Addr
Control Register 2 (CANCTRL2)
CANCTRL2
PRESDIV
PRESDIV
MSB
PSEG1
PSEG2
Name
0
Name
RJW
1
0x30 7088 (CANCTRL2_A); 0x30 7488 (CANCTRL2_B); 0x30 7888 (CANCTRL2_C)
Prescaler divide factor. PRESDIV determines the ratio between the system clock frequency
and the serial clock (S-clock). The S-clock is determined by the following calculation:
The reset value of PRESDIV is 0x00, which forces the S-clock to default to the same
frequency as the system clock. The valid programmed values are 0 through 255.
See
See
Resynchronization jump width. The RJW field defines the maximum number of time quanta
a bit time may be changed during resynchronization. The valid programmed values are zero
through three.
The resynchronization jump width is calculated as follows:
PSEG1[2:0] — Phase buffer segment 1. The PSEG1 field defines the length of phase buffer
segment one in the bit time. The valid programmed values are zero through seven.
The length of phase buffer segment 1 is calculated as follows:
PSEG2 — Phase Buffer Segment 2. The PSEG2 field defines the length of phase buffer
segment two in the bit time. The valid programmed values are zero through seven.
The length of phase buffer segment two is calculated as follows:
2
Resynchronizaton Jump Width = (RJW + 1) Time Quanta
Phase Buffer Segment 1 = (PSEG1 + 1) Time Quanta
Phase Buffer Segment 2 = (PSEG2 + 1) Time Quanta
Table
Table
Figure 16-14. Control Register 2 (CANCTRL2)
PRESDIV
3
Table 16-18. CANCTRL2 Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 16-17. PRESDIV Bit Descriptions
16-18.
16-17.
4
5
0000_0000_0000_0000
6
S-clock
7
=
----------------------------------- -
PRESDIV
Description
Description
8
RJW
f SYS
9
+
1
10
PSEG1
11
12
Freescale Semiconductor
13
PSEG2
Eqn. 16-1
14
LSB
15