MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 322

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Clocks and Power Control
1
2
3
8-20
Software is active only in normal-high/low modes.
TEXPS receives the zero value by writing one. Writing of zero has no effect on TEXPS.
The switch from normal-high to normal-low is enable only if the conditions to asynchronous interrupt are cleared.
Software
Software
Software
Software
Software
Software
1
1
1
1
1
1
Normal-Low
LPM = 00, CSRC = 1
Doze-Low
LPM = 01, CSRC = 1
Doze-High
LPM = 01, CSRC = 0/1
Sleep Mode
LPM = 10, CSRC = 0
Deep-Sleep Mode
LPM = 11, CSRC = 0,
TEXPS = 1
Power-Down Mode
LPM = 11, CSRC = 0,
TEXPS = 0
Figure 8-9. Low-Power Modes Flow Diagram
MPC561/MPC563 Reference Manual, Rev. 1.2
2
((MSR[POW]+Interrupt))*CSRC
(MSR[POW]+Interrupt)+PLPRCR[CSRC]
RTC/PIT/TB/DEC Interrupt
followed by External Hard Reset
RTC/PIT/TB/DEC
Async. Wake-up or
Wake-up:
Frequency Clocks
Hard Reset
Software
Wake-up: 3 - 4 SysFreq
Asynchronous
Wake-up: 3 - 4 Sys
Freqmax
Interrupts
Interrupt
1
500 Input
Clocks
Clocks
Interrupt
3
Freescale Semiconductor
Normal
High Mode
LPM = 00
CSRC = 0/1