MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 430

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Memory Controller
10.9.2
10.9.3
10-32
,
,
1
2
HRESET(BR[1:3])
HRESET(BR[1:3])
12:15
HRESET
Bits
8:11
The reset value is determined by the value on the internal data bus during reset (reset-configuration word).
See
0:7
HRESET(BR0)
HRESET(BR0)
Field
Addr
Table 10-9
Memory Controller Status Registers (MSTAT)
Memory Controller Base Registers (BR0–BR3)
WPER0 –
WPER3
MSB
Name
0
Field
—
—
Addr
for reset value.
1
MSB
BA
16
0
Reserved
Write protection error for bank x. This bit is asserted when a write-protect error occurs for the
associated memory bank. A bus monitor (responding to TEA assertion) will, if enabled, prompt
the read of this register if TA is not asserted during a write cycle. WPERx is cleared by writing
one to the bit or by performing a system reset. Writing a zero has no effect on WPER.
Reserved
Figure 10-23. Memory Controller Base Registers 0–3 (BR0–BR3)
Unchanged
2
Figure 10-22. Memory Controller Status Register (MSTAT)
17
1
3
0x2F C100 (BR0); 0x2F C108 (BR1); 0x2F C110 (BR2); 0x2F C118 (BR3)
—
AT
18
2
MPC561/MPC563 Reference Manual, Rev. 1.2
4
19
Table 10-7. MSTAT Bit Descriptions
3
5
ID[4:5]
20
4
PS
6
21
5
SST WP
7
22
6
0000_0000_0000_0000
00
WPER0 WPER1 WPER2 WPER3
23
7
0x2F C178
8
Unchanged
Unchanged
Unchanged
Undefined
Description
—
24
8
BA
9
BL WEBS TBDIP LBDIP SETA
25
9
10
26
10
0
11
27
11
Undefined
12
28
12
Freescale Semiconductor
13
29
13
—
14
14
30
BI
1
LSB
LSB
ID3
15
X
15
31
V
2