MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1105
![](/photos/31/37/313722/mpc561mzp56_sml.jpg)
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
12:13
14:15
16:17
18:19
Bits
9:11
0:2
3:5
6:8
20
21
22
23
24
25
26
27
Mnemonic
DIWP0EN
DIWP1EN
DIWP2EN
DIWP3EN
SIWP0EN
SIWP1EN
SIWP2EN
SIWP3EN
IWP0
IWP2
IWP3
CTC
CTD
CTB
CTA
W1
Compare type of comparator A
Compare type of comparator B
Compare type of comparator C
Compare type of comparator D
I-bus 1st watchpoint
programming
I-bus 2nd watchpoint
programming
I-bus 3rd watchpoint
programming
I-bus 4th watchpoint
programming
Software trap enable selection of
the 1st I-bus watchpoint
Software trap enable selection of
the 2nd I-bus watchpoint
Software trap enable selection of
the 3rd I-bus watchpoint
Software trap enable selection of
the 4th I-bus watchpoint
Development port trap enable
selection of the 1st I-bus
watchpoint (read only bit)
Development port trap enable
selection of the 2nd I-bus
watchpoint (read only bit)
Development port trap enable
selection of the 3rd I-bus
watchpoint (read only bit)
Development port trap enable
selection of the 4th I-bus
watchpoint (read only bit)
MPC561/MPC563 Reference Manual, Rev. 1.2
Description
Table A-1. ICTRL Bit Descriptions
0xx = not active (reset value)
100 = equal
101 = less than
110 = greater than
111 = not equal
0x = not active (reset value)
10 = match from comparator A
11 = match from comparators (A&B)
0x = not active (reset value)
10 = match from comparator B
11 = match from comparators (A | B)
0x = not active (reset value)
10 = match from comparator C
11 = match from comparators (C&D)
0x = not active (reset value)
10 = match from comparator D
11 = match from comparators (C | D)
0x = not active (reset value)
10 = match from comparator D
11 = match from comparators (C | D)
0 = trap disabled (reset
value)
1 = trap enabled
0 = trap disabled (reset
value)
1 = trap enabled
Non-compressed mode
MPC562/MPC564 Compression Features
Function
1xx = not active
000 = equal (reset value)
001 = less than
010 = greater than
011 = not equal
0 = trap disabled (reset
value)
1 = trap enabled
0 = trap disabled (reset
value)
1 = trap enabled
Compressed Mode
1
A-17
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