MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 370
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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External Bus Interface
The MPC561/MPC563 performs operand transfers through its 32-bit data port. If the transfer is controlled
by the internal memory controller, the MPC561/MPC563 can support 8- and 16-bit data port sizes.
The bus requires that the portion of the data bus used for a transfer to or from a particular port size be fixed.
A 32-bit port resides on DATA[0:31], a 16-bit port must reside on DATA[0:15], and an 8-bit port must
reside on DATA[0:7]. The MPC561/MPC563 always tries to transfer the maximum amount of data on all
bus cycles. For a word operation, it always assumes that the port is 32 bits wide when beginning the bus
cycle.
In
9-30
Figure
•
•
•
•
•
Word accesses require address bits 30 – 31 to equal zero
Burst accesses require address bits 30 – 31 to equal zero
OP0 is the most-significant byte of a word operand and OP3 is the least-significant byte.
The two bytes of a half-word operand are either OP0 (most-significant) and OP1 or OP2
(most-significant) and OP3, depending on the address of the access.
The single byte of a byte-length operand is OP0, OP1, OP2, or OP3, depending on the address of
the access.
9-22,
0
Figure
OP0
OP0
OP0
9-23,
Table
Figure 9-22. Internal Operand Representation
MPC561/MPC563 Reference Manual, Rev. 1.2
OP1
OP1
OP1
9-2, and
Table
OP2
OP2
OP2
9-3, the following conventions are used:
OP3
OP3
OP3
31
Word
Half-word
Byte
Freescale Semiconductor
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