EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 1011

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
Protocol Settings
Figure 1–17. MegaWizard Plug-In Manager—ALTGX (PCIe 2 Screen)
Table 1–17. MegaWizard Plug-In Manager Options (PCIe 2 Screen) (Part 1 of 2)
February 2011 Altera Corporation
Create a pipestatus output port
for PIPE interface status signal.
Create a pipedatavalid output
port to indicate valid data from the
receiver.
ALTGX Setting
Figure 1–17
Manager.
Table 1–17
Manager for your ALTGX custom megafunction variation.
lists the available options on the PCIe 2 screen of the MegaWizard Plug-In
shows the PCIe 2 screen of Protocol Settings for the MegaWizard Plug-In
The PCIe interface block receives status signals
from the transceiver channel PCS and PMA blocks
and encodes the status on a 3-bit output signal
(pipestatus[2:0]) that is forwarded to the FPGA
fabric.
This is an output status port that indicates the
receiver parallel data on the rx_dataout port is
valid.
Description
Stratix IV Device Handbook Volume 3
“Receiver Status” section and
Table 1-53 in the
Architecture in Stratix IV
Devices
chapter.
Reference
—
Transceiver
1–53