EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 293

IC STRATIX IV FPGA 530K 1152HBGA

EP4SGX530HH35C2N

Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Differential Transmitter
Figure 8–10. Quartus II Software Assignment Editor—Programmable V
February 2011 Altera Corporation
Pre-emphasis is an important feature for high-speed transmission. Without
pre-emphasis, the output current is limited by the V
impedance of the driver. At high frequency, the slew rate may not be fast enough to
reach full V
With pre-emphasis, the output current is boosted momentarily during switching to
increase the output slew rate. The overshoot introduced by the extra current happens
only during switching and does not ring, unlike the overshoot caused by signal
reflection. The amount of pre-emphasis needed depends on the attenuation of the
high-frequency component along the transmission line. The Quartus II software
allows four settings for programmable pre-emphasis—zero (0), low (1), medium (2),
and high (3). The default setting is low.
The V
high (2), and high (3). The default setting is medium low.
Programmable V
You can statically assign the V
the assignment name for programmable V
software Assignment Editor.
Table 8–8. Quartus II Software Assignment Editor
Figure 8–10
from the Quartus II software Assignment Editor.
To
Assignment name
Allowed values
OD
is also programmable with four settings: low (0), medium low (1), medium
OD
shows the assignment of programmable V
before the next edge, producing pattern-dependent jitter.
OD
tx_out
Programmable Differential Output Voltage (V
0, 1, 2, 3
OD
settings from the Assignment Editor.
OD
OD
and its possible values in the Quartus II
OD
OD
setting and the output
for a transmit data output
Stratix IV Device Handbook Volume 1
OD
)
Table 8–8
lists
8–15

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