EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 906

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

5–60
Table 5–12. Two Conditions Under Which You can Re-Use .mifs (logical_tx_pll_sel and logical_tx_pll_sel_en)
Stratix IV Device Handbook Volume 2: Transceivers
Condition 1: Re-use the .mif created for one CMU PLL on
the other CMU PLL of the same transceiver block.
Channel and CMU PLL
Reconfiguration and CMU
PLL Reconfiguration
Consider that you create a
.mif containing the desired
ALTGX settings to
reconfigure the CMU0 PLL.
Assume that the logical
reference index you
assigned to CMU0 PLL is 0.
■
■
You can re-use this .mif
created for CMU0 PLL on
CMU1 PLL of the same
transceiver block if you
want to reconfigure
CMU1 PLL to the new
data rate information
stored in the .mif.
You must set
logical_tx_pll_
sel to the logical
reference index of CMU1
PLL (1'b1) and
logical_tx_pll_
sel_en to 1'b1 and then
write this .mif into the
transceiver channel. By
doing so, the dynamic
reconfiguration
controller overwrites the
logical tx pll value stored
in the .mif with the
logical reference index of
CMU1 PLL.
Table 5–12
logical_tx_pll_sel and logical_tx_pll_sel_en ports.
Guidelines for Specifying the Input Reference Clocks
The following are guidelines for setting up the input reference clocks in the
Reconfiguration Settings screen of the ALTGX MegaWizard Plug-In Manager.
■
■
■
Assign the identification numbers to all input reference clocks that are used by the
transmitter PLLs in their corresponding PLL screens. You can set up a maximum
of 10 input reference clocks and assign identification numbers from 1 to 10.
Keep the identification numbers consistent for all the .mifs generated in the
design.
Maintain the input reference clock frequencies settings for all the .mifs.
Channel Reconfiguration
with Transmitter PLL
Select
Assume that the transceiver
channel listens to CMU1 PLL
and the logical reference
index assigned to it is 0.
■
■
■
■
Generate a .mif for these
settings.
When you use channel
reconfiguration with
transmitter PLL select
mode and reconfigure
the transceiver channel
with this .mif, the
transceiver channel is
reconfigured to listen to
CMU1 PLL.
If you want to
reconfigure the
transceiver channel to
listen to CMU0 PLL
instead, you can re-use
this .mif.
You must set
logical_tx_pll_
sel to the logical
reference index of CMU0
PLL (1'b1) and
logical_tx_pll_
sel_en to 1'b1 and then
write this .mif into the
transceiver channel.
lists the two conditions under which you can re-use .mifs when using the
Condition 2: Re-use the .mif created for one transmitter PLL on
the transmitter PLL of another transceiver block.
Channel and CMU PLL
Reconfiguration and CMU
PLL Reconfiguration
Consider that you create a .mif
containing the desired ALTGX
settings to reconfigure the
transmitter PLL of a
transceiver block. Assume that
the logical reference of the
transmitter PLL is 1.
■
■
You can re-use this .mif
created to reconfigure the
transmitter PLL of another
transceiver block under the
following condition:
■
You must set
logical_channel_
address to the logical
channel address of the
transmitter PLL you intend
to reconfigure.
You want to reconfigure
the transmitter PLL of
the other transceiver
block to exactly the same
data rate information
stored in the .mif.
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Channel Reconfiguration with
Transmitter PLL Select
Consider that you create a .mif
containing the logical
reference index of the
transmitter PLL that the
reconfigured transceiver
channel needs to listen to.
■
■
■
February 2011 Altera Corporation
Assume that the transmitter
PLL used is CMU0 PLL and
the logical reference index
assigned is 0.
When you use channel
reconfiguration with
transmitter PLL select
mode and reconfigure the
transceiver channel with
this .mif, the transceiver
channel is reconfigured to
listen to CMU0 PLL.
If you want to reconfigure
this transceiver channel to
listen to another transmitter
PLL outside the transceiver
block, you can reuse this
.mif, provided the intended
data rate is the same.