EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 83

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV DSP Block Overview
Table 4–1. Number of DSP Blocks in Stratix IV Devices (Part 2 of 2)
Figure 4–1. Overview of DSP Block Signals
February 2011 Altera Corporation
Notes to
(1) This is applicable for all packages in EP4SGX360 except F1932.
(2) This is applicable for EP4SGX360F1932 only.
Stratix IV GT
Family
Table
Control
Input
Data
EP4S40G2
EP4S40G5
EP4S100G2
EP4S100G3
EP4S100G4
EP4S100G5
4–1:
Device
288
Table 4–1
18 × 18 multiplier functionality in the 36 × 36, complex 18 × 18, and summation
modes.
Each DSP block occupies four LABs in height and can be divided further into two half
blocks that share some common clock signals, but are for all common purposes
identical in functionality.
144
144
34
161
128
161
104
128
128
shows that the largest Stratix IV DSP-centric device provides up to 1288
Multipliers
1,288
1,024
1,288
1,024
1,024
9 × 9
832
Full DSP Block
Independent Input and Output Multiplication Operators
Multipliers
Figure 4–1
12 × 12
966
768
966
624
768
768
Half-DSP Block
Half-DSP Block
Multipliers
shows the layout of each DSP block.
18 × 18
644
512
644
416
512
512
Complex
18 × 18
322
256
322
208
256
256
Multipliers
36 × 36
Stratix IV Device Handbook Volume 1
322
256
322
208
256
256
72
72
High-Precision
Adder Mode
Multipliers
Multiplier
Output
Data
Output
Data
18 × 36
644
512
644
416
512
512
Multipliers
Multiplier
4–3
18 × 18
Adder
1,288
1,024
1,288
1,024
1,024
Mode
Four
832