EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 397

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Quartus II Software Support
Quartus II Software Support
Figure 10–28. Interface Signals between the ALTREMOTE_UPDATE Megafunction and the Nios II Processor
April 2011 Altera Corporation
ALTREMOTE_UPDATE Megafunction
f
Nios II Processor or
The Quartus II software provides the flexibility to include the remote system upgrade
interface between the Stratix IV device logic array and the dedicated circuitry,
generate configuration files for production, and allows remote programming of the
system configuration memory.
The ALTREMOTE_UPDATE megafunction is the implementation option in the
Quartus II software that you use for the interface between the remote system upgrade
circuitry and the device logic array interface. Using the megafunction block instead of
creating your own logic saves design time and offers more efficient logic synthesis
and device implementation.
The ALTREMOTE_UPDATE megafunction provides a memory-like interface to the
remote system upgrade circuitry and handles the shift register read and write
protocol in the Stratix IV device logic. This implementation is suitable for designs that
implement the factory configuration functions using a Nios II processor or user logic
in the device.
Figure 10–28
megafunction and Nios II processor or user logic.
For more information about the ALTREMOTE_UPDATE megafunction and the
description of ports shown in
(ALTREMOTE_UPDATE) Megafunction User
User Logic
shows the interface signals between the ALTREMOTE_UPDATE
Figure
10–28, refer to the
read_param
write_param
param[2..0]
data_in[23..0]
reconfig
reset_timer
clock
reset
busy
data_out[23..0]
Guide.
ALTREMOTE_UPDATE
Remote Update Circuitry
Stratix IV Device Handbook Volume 1
10–63