EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 970
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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1–12
Table 1–1. MegaWizard Plug-In Manager Options (General Screen for Basic Mode) (Part 9 of 10)
Stratix IV Device Handbook Volume 3
What is the input clock
frequency?
ALTGX Setting
Basic
Basic (PMA Direct)
■
■
Deterministic Latency
GIGE
(OIF) CEI PHY Interface
SDI
SONET/SDH
Based on the effective data rate value in the What is the
effective data rate? field, the ALTGX MegaWizard
Plug-In Manager determines the input reference clock
frequencies depending on the available multiplier
settings.
PCIe
This option is not available in PCIe mode. The input
reference clock frequency is fixed to 100 MHz in PCIe
mode.
Serial RapidIO
This option provides the available input reference clock
frequencies depending on whether your effective serial
data rate is 1250 Mbps, 2500 Mbps, or 3125 Mbps and
the available multiplier settings.
XAUI
This option provides the available input reference clock
frequencies depending on whether your effective serial
data rate is 3125 Mbps or 3750 Mbps and the available
multiplier settings.
If you select the Input Clock Frequency option in the
What would you like to base the setting on? field, the
ALTGX MegaWizard Plug-In Manager allows you to
specify the input reference clock frequency in this
field.
If you select the Data Rate option in the What would
you like to base the setting on? field, the ALTGX
MegaWizard Plug-In Manager displays the list of input
reference clock frequencies in this field.
Description
Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
“Input Reference Clocking”
section in the
Clocking in Stratix IV Devices
chapter.
February 2011 Altera Corporation
Reference
Transceiver
Parameter Settings
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