EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 176

IC STRATIX IV FPGA 530K 1152HBGA

EP4SGX530HH35C2N

Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP4SGX530HH35C2N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP4SGX530HH35C2N
Manufacturer:
ALTERA
0
Part Number:
EP4SGX530HH35C2NAD
Manufacturer:
ALTERA
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Part Number:
EP4SGX530HH35C2NAE
Manufacturer:
ALTERA
0
6–4
Table 6–2. I/O Standards and Voltage Levels for Stratix IV Devices
Stratix IV Device Handbook Volume 1
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
Differential SSTL-2
Class I
Differential SSTL-2
Class II
Differential
SSTL-18 Class I
Differential
SSTL-18 Class II
Differential
SSTL-15 Class I
Differential
SSTL-15 Class II
Differential
HSTL-18 Class I
Differential
HSTL-18 Class II
Differential
HSTL-15 Class I
Differential
HSTL-15 Class II
Differential
HSTL-12 Class I
Differential
HSTL-12 Class II
LVDS (4), (5),
RSDS (6), (7),
mini-LVDS (6),
(8)
(7),
I/O Standard
(8)
(8)
JESD8-16A
JESD8-16A
JESD8-16A
JESD8-16A
JESD8-9B
JESD8-9B
JESD8-15
JESD8-15
ANSI/TIA/
Standard
JESD8-6
JESD8-6
JESD8-6
JESD8-6
JESD8-6
JESD8-6
JESD8-6
JESD8-6
Support
EIA-644
I/O Banks
Column
Input Operation
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
I/O Banks
Row
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
V
CCIO
(V)
I/O Banks
Column
Output Operation
1.8
1.8
1.5
1.5
1.2
1.2
2.5
2.5
1.8
1.8
1.5
1.5
1.8
1.8
1.5
1.5
1.2
1.2
2.5
2.5
2.5
(Note 1)
I/O Banks
Row
1.8
1.8
1.5
1.2
2.5
2.5
1.8
1.8
1.5
1.8
1.8
1.5
1.2
2.5
2.5
2.5
(Part 2 of 3)
Chapter 6: I/O Features in Stratix IV Devices
(Pre-Driver
V
Voltage)
CCPD
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
(V)
February 2011 Altera Corporation
(Input Ref
Voltage)
V
REF
0.90
0.90
0.75
0.75
0.6
0.6
I/O Standards Support
(V)
Termination
Voltage)
(Board
V
0.90
0.90
0.75
0.75
1.25
1.25
0.90
0.90
0.75
0.75
0.90
0.90
0.75
0.75
0.60
0.60
TT
0.6
0.6
(V)

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