EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 111

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
Figure 4–20. Shift Operation Mode Shown for a Half DSP Block
Table 4–5. Examples of Shift Operations
February 2011 Altera Corporation
Logical Shift Left
LSL[N]
Logical Shift Right
LSR[32-N]
Arithmetic Shift Left
ASL[N]
Arithmetic Shift Right
ASR[32-N]
Rotation ROT[N]
Example
dataa_0[35..18]
datab_0[35..18]
datab_0[35..18]
dataa_0[35..18]
dataa_0[17..0]
datab_0[17..0]
dataa_0[17..0]
datab_0[17..0]
Unsigned
Unsigned
Unsigned
Signed
Signed
Signa
Half-DSP Block
clock[3..0]
ena[3..0]
aclr[3..0]
Unsigned
Unsigned
Unsigned
Unsigned
Unsigned
Signb
Shift
0
1
0
1
0
+
+
shift_right
Rotate
rotate
signa
signb
0
0
0
0
1
0xAABBCCDD
0xAABBCCDD
0xAABBCCDD
0xAABBCCDD
0xAABBCCDD
+
A-input
0x0000100
0x0000100
0x0000100
0x0000100
0x0000100
Stratix IV Device Handbook Volume 1
B-input
32
0xBBCCDDAA
0xBBCCDD00
0xBBCCDD00
result[ ]
0x000000AA
0xFFFFFFAA
Result
4–31