EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 106

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

4–26
Figure 4–17. Four-Multiplier Adder Mode Shown for a Half DSP Block
Note to
(1) Block output for accumulator overflow and saturate overflow.
Stratix IV Device Handbook Volume 1
Figure
Four-Multiplier Adder
dataa_0[ ]
datab_0[ ]
dataa_1[ ]
datab_1[ ]
datab_2[ ]
dataa_3[ ]
datab_3[ ]
dataa_2[ ]
4–17:
In the four-multiplier adder configuration shown in
implement two four-multiplier adders (one four-multiplier adder per half DSP block).
These modes are useful for implementing one-dimensional and two-dimensional
filtering applications. The four-multiplier adder is performed in two addition stages.
The outputs of two of the four multipliers are initially summed in the two first-stage
adder blocks. The results of these two adder blocks are then summed in the
second-stage adder block to produce the final four-multiplier adder result, as shown
by
Equation 4–2 on page 4–5
Half-DSP Block
clock[3..0]
ena[3..0]
aclr[3..0]
+
+
output_saturate
output_round
and
signa
signb
Equation 4–3 on page
+
Figure
Chapter 4: DSP Blocks in Stratix IV Devices
4–5.
Stratix IV Operational Mode Descriptions
4–17, the DSP block can
overflow (1)
February 2011 Altera Corporation
result[ ]