EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 775

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Combining Channels Configured in Protocol Functional Modes
Figure 3–9. Examples of Supported and Unsupported Configurations to Combine Instances in Basic ×8 Mode
February 2011 Altera Corporation
Two Adjacent Transceiver Blocks
Basic mode and ×8 sub-protocol
Receiver and Transmitter
(any functional mode)
1
Receiver only
Configuration
2 Channels
Instance 1
6 Channels
Supported
Instance 0
Each receiver channel configured in Basic ×8 functional mode is clocked
independently by the recovered clock from its receiver CDR. You can use the available
receiver channels in any configuration.
unsupported configuration in Basic ×8 mode.
When the eight regular channels are used up in bonded ×8 functional mode:
■
If the ATX PLL is used to generate clocks for the ×8 functional mode shown in
Figure
transceiver block) in Basic (PMA Direct) ×N mode. Within Basic (PMA Direct) ×N
mode, you can configure the CMU0 channels in the master and slave transceiver
block only in single-width mode (use the single-width mode option in the
General screen). If a CMU1 channel or regular channels are available for use, you
can use them in Basic (PMA Direct) ×N mode in single-width or double-width
configuration.
3–10, you can use the four CMU channels (two from the master and slave
Two Adjacent Transceiver Blocks
Basic mode and ×4 sub-protocol
Receiver and Transmitter
Transmitter and Receiver
(Basic [PMA Direct] xN
Functional mode)
Configuration
Supported
6 Channels
Instance 0
Instance 1
1 Channel
Figure 3–9
Stratix IV Device Handbook Volume 2: Transceivers
shows examples of supported and
Two Adjacent Transceiver Blocks
Basic mode and ×8 sub-protocol
Transmitter only (any mode other than
Basic [PMA Direct] function mode)
Receiver and Transmitter
Configuration
Unsupported
6 Channels
Instance 0
Instance 1
2 Channels
Red: Unsupported
3–21