EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 395

IC STRATX III FPGA 150K 1152FBGA

EP3SL150F1152C3N

Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of EP3SL150F1152C3N

Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES

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Chapter 12: Remote System Upgrades with Stratix III Devices
Dedicated Remote System Upgrade Circuitry
Remote System Upgrade State Machine
User Watchdog Timer
© March 2010
Altera Corporation
1
The remote system upgrade control and update registers have identical bit
definitions, but serve different roles (refer to
be updated when the device is loaded with a factory configuration image, the update
register writes are controlled by the user logic; the control register writes are
controlled by the remote system upgrade state machine.
In factory configurations, the user logic sends the AnF bit (set high), the page address,
and the watchdog timer settings for the next application configuration bit to the
update register. When the logic array configuration reset (RU_nCONFIG) goes high,
the remote system upgrade state machine updates the control register with the
contents of the update register and initiates system reconfiguration from the new
application page.
To ensure the successful reconfiguration between the pages, assert RU_nCONFIG
signal for a minimum of 250 ns. This is equivalent to strobing the reconfig input of
the ALTREMOTE_UPDATE megafunction high for a minimum of 250 ns.
In the event of an error or reconfiguration trigger condition, the remote system
upgrade state machine directs the system to load a factory or application
configuration (page zero or page one, based on the mode and error condition) by
setting the control register accordingly.
register after such an event occurs for all possible error or trigger conditions.
The remote system upgrade status register is updated by the dedicated error
monitoring circuitry after an error condition but before the factory configuration is
loaded.
Table 12–5. Control Register Contents After an Error or Reconfiguration Trigger Condition
Capture operations during factory configuration access the contents of the update
register. This feature is used by the user logic to verify that the page address and
watchdog timer settings were written correctly. Read operations in application
configurations access the contents of the control register. This information is used by
the user logic in the application configuration.
The user watchdog timer prevents a faulty application configuration from stalling the
device indefinitely. The system uses the timer to detect functional errors after an
application configuration is successfully loaded into the Stratix III device.
CORE triggered reconfiguration
Reconfiguration Error/Trigger
nCONFIG reset
nSTATUS error
Wd time out
CRC error
Table 12–5
Table
12–2). While both registers can only
lists the contents of the control
Control Register Setting
Remote Update
Update register
Stratix III Device Handbook, Volume 1
All bits are 0
All bits are 0
All bits are 0
All bits are 0
12–11

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