SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 104

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
7. After the interrupt generation unit has generated the interrupt pulse it waits for a write
6.5
Currently the EPEC interrupt controller implements a clear on write functionality.
This implies the following for the interrupt routine:
1. One of two conditions generates an entry into the EPEC interrupt register: either a
2. The interrupt routine is triggered by the interrupt pulse that the EPEC interrupt
3. The routine should then read the EPEC interrupt register to determine the source of
4. The interrupt has to be acknowledged by writing a ‘1’ to the position of the interrupt
5. Now the interrupt controller is ready to generate the next interrupt pulse.
to the interrupt register. It then is ready to generate the next interrupt pulse to the CPU.
If no write to the interrupt register takes place, no new interrupt pulse can be asserted.
channel start or a channel transmit end of data (for endpoint 0 this functionality is
reduced to start for direction in, EPEC transmit; and end for direction out, EPEC
receive; otherwise we would have more than 16 interrupts). The generation of the
entries into the EPEC interrupt register can be controled by programming the EPEC
interrupt mask register.
controller gernerates on irq(40).
the interrupt.
source in the EPEC interrupt register.
Implementation of EPEC Interrupt Generation Unit
104
DMA - External PEC (EPEC)
2001-04-19
C161U

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