SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 185

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

CS Signal Generation
During external accesses the EBC can generate a (programmable) number of CS lines
on Port 6, which allow to directly select external peripherals or memory banks without
requiring an external decoder. The number of CS lines is selected during reset and
coded in bit field CSSEL in register RP0H (see table below).
The CSx outputs are associated with the BUSCONx registers and are driven active (low)
for any access within the address area defined for the respective BUSCON register. For
any access outside this defined address area the respective CSx signal will go inactive
(high). At the beginning of each external bus cycle the corresponding valid CS signal is
determined and activated. All other CS lines are deactivated (driven high) at the same
time.
Note: The CSx signals will not be updated for an access to any internal address area (ie.
The chip select signals allow to be operated in four different modes, which are selected
via bits CSWENx and CSRENx in the respective BUSCONx register.
Data Sheet
SALSEL
1 1
1 0
0 1
0 0
CSSEL
1 1
1 0
0 1
0 0
CSWEN
x
0
0
when no external bus cycle is started), even if this area is covered by the
respective ADDRSELx register. An access to an on-chip X-Peripheral deactivates
all external CS signals.
Upon accesses to address windows without a selected CS line all selected CS
lines are deactivated.
CSREN
x
0
1
Segment Address Lines
Two:
Seven: A20...A16
None
Four:
Chip Select Lines
Four:
None
Two:
Three:
Chip Select Mode
Address Chip Select (Default after Reset, mode for CS0)
Read Chip Select
A17...A16
A19...A16
CS3...CS0
CS1...CS0
CS2...CS0
185
Directly accessible Address Space
256 KByte (Default without pull-downs)
2 MByte (Maximum)
64 KByte (Minimum)
1 MByte
Note
Default without pull-downs
Port 6 pins free for I/O
External Bus Interface
2001-04-19
C161U