SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 365

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

C161U
System Reset
Internal RAM after Reset
The contents of the internal RAM are not affected by a system reset. However, after
power-on the contents of the internal RAM are undefined. This implies that the GPRs
(R15...R0) and the PEC source and destination pointers (SRCP7...SRCP0,
DSTP7...DSTP0) which are mapped into the internal RAM are also unchanged after a
hardware reset, software reset or watchdog reset, but are undefined after power-on.
Ports and External Bus Configuration during Reset
During the internal reset sequence all of the C161U's port pins are configured as inputs
by clearing the associated direction registers, and their pin drivers are switched to the
high impedance state. This ensures that the C161U and external devices will not try to
drive the same pin to different levels. Pin ALE is held low through an internal pulldown,
and pins RD and WR are held high through internal pullups. Also the pins selected for
CS output will be pulled high.
The registers SYSCON and BUSCON0 are initialized according to the configuration
selected via PORT0:
• the Bus Type field (BTYP) in register BUSCON0 is initialized according to P0L.7 and
P0L.6
• bit BUSACT0 in register BUSCON0 is set to ‘1’
• bit ALECTL0 in register BUSCON0 is set to ‘1’
• bit ROMEN in register SYSCON will be cleared to ‘0’
• bit BYTDIS in register SYSCON is set according to the data bus width
Note: In the C161U, pin EA must always be set to ’0’. The "internal start" (EA=’1’), known
from other Infineon C16x devices is not supported.
The other bits of register BUSCON0, and the other BUSCON registers are cleared. This
default initialization selects the slowest possible external accesses using the configured
bus type. The Ready function is disabled at the end of the internal system reset.
When the internal reset has completed, the configuration of PORT0, PORT1, Port 4,
Port 6 and of the BHE signal (High Byte Enable, alternate function of P3.12) depends on
the bus type which was selected during reset. When any of the external bus modes was
selected during reset, PORT0 (and PORT1) will operate in the selected bus mode. Port 4
will output the selected number of segment address lines (all zero after reset) and Port 6
will drive the selected number of CS lines (CS0 will be ‘0’, while the other active CS lines
will be ‘1’). When no memory accesses above 64 K are to be performed, segmentation
may be disabled.
When the on-chip bootstrap loader was activated during reset, pin TxD0 (alternate
function of P3.10) will be switched to output mode after the reception of the zero byte.
All other pins remain in the high-impedance state until they are changed by software or
peripheral operation.
Data Sheet
365
2001-04-19