SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 393

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

The user gets access to the flexible operation control of peripherals via the SYSCON3
register. This register is defined as follows:
.
Note: Please refer to Chapter 10.8, "Initialization of the C161U’s X-peripherals", for
Note: SYSCON3 is an security register. The security level is automatically set to write
Data Sheet
SYSCON3 (F1D4
GRP
Bit
PERDISx Peripheral Disable Flag 0 - 14
GRPDIS
USBTDIS USB Transceiver Disable Flag ONLY IF BIT XPERCON.6 = ’1’
PLLDIS
PERDISx Module Type
0
1
DIS
rw
15
serv
complete register initialization.
protection after execution of EINIT
re-
ed
14
-
PLL
DIS
PD-Bus Unit
PD-Bus Unit
Function
‘0’: Module is enabled; the peripheral is supplied with the clock signal
‘1’: Module is disabled; the clock input of peripheral is disabled
Peripheral Group Disable Flag (PD-Bus and X-Bus Peripherals)
‘0’: Peripheral clock driver for peripheral group is enabled
‘1’: Peripheral clock driver for peripheral group is disabled
‘00’: Normal operation, USB transceiver enabled
‘01’: Suspend mode, differencial transceiver switched off
‘10’: Reserved, do not use this combination.
‘11’: Full power down.
If bit 6 of register XPERCON set to ’0’, the USB transceiver is always
switched off (power down mode), independently of bit USBTDIS.
PLL Disable Flag (additional power savings / noise reduction feature)
‘0’: The PLL of the C161U is switched on. This is the default configuration.
‘1’: The PLL is completely switched off. The free running feature and the
It makes sense to switch off the PLL in direct drive clock mode only.
13
rw
oscillator watchdog will not work, since there is no PLL clock at all.
H
12
/ EA
USBTDIS
rw
H
)
11
reserved
10
-
Module
RTC
ASC
9
-
DIS8
PER
rw
8
ESFR-b
393
DIS7
PER
Function (examples for associated
peripheral modules)
Real Time Clock
USART
rw
7
DIS6
PER
rw
6
reserved
5
-
System Control Unit (CSCU)
4
-
DIS3
PER
rw
3
Reset Value:0000
DIS2
PER
rw
2
DIS1
PER
rw
2001-04-19
1
C161U
DIS0
PER
rw
0
H